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dc.contributor.authorGan, Kai-Jhihen_US
dc.contributor.authorLiu, Po-Tsunen_US
dc.contributor.authorChiu, Yu-Chuanen_US
dc.contributor.authorRuan, Dun-Baoen_US
dc.contributor.authorChien, Ta-Chunen_US
dc.contributor.authorSze, Simon M.en_US
dc.date.accessioned2019-04-02T06:00:00Z-
dc.date.available2019-04-02T06:00:00Z-
dc.date.issued2018-11-25en_US
dc.identifier.issn0257-8972en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.surfcoat.2018.08.093en_US
dc.identifier.urihttp://hdl.handle.net/11536/148308-
dc.description.abstractWe demonstrate the characteristics of a conductive-bridging random access memory (CBRAM) with Cu/TiW/InGaZnO/Ga2O3/Pt stack structure. The addition of a thin metal-oxide layer (4.5 nm-thick Ga2O3) in the bottom of the CBRAM device significantly increases the off-state resistance (Rom') and the memory window. The IGZO bi-layer CBRAM shows the excellent memory performances, such as low operation current (down to 50 A), high on/off resistance ratio (> 10(3)), high switching endurance (up to 10(3) cycles) and the capability of multi-level tuning. Meanwhile, high thermal stability was also achieved. Three decades of resistance window is constantly maintained beyond 10(4)s at 85 degrees C. The resistive switching stability and electrical uniformity of bi-layer IGZO/Ga2O3 CBRAM device are obviously enhanced as compared with the one only with a single layer of IGZO film. These results have given a great potential for the transparent amorphous oxide semiconductor (TAOS)-based material utilizing in CBRAM stacks and integrating into the display circuits for future memory-in-pixel applications.en_US
dc.language.isoen_USen_US
dc.subjectConductive-bridge random access memory (CBRAM)en_US
dc.subjectIndium-gallium-zinc-oxideen_US
dc.subjectGallium oxideen_US
dc.subjectThermal conductivityen_US
dc.subjectPhysical vapor depositionen_US
dc.titleTAOS based Cu/TiW/IGZO/Ga2O3/Pt bilayer CBRAM for low-power display technologyen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.surfcoat.2018.08.093en_US
dc.identifier.journalSURFACE & COATINGS TECHNOLOGYen_US
dc.citation.volume354en_US
dc.citation.spage169en_US
dc.citation.epage174en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentDepartment of Photonicsen_US
dc.identifier.wosnumberWOS:000447475100020en_US
dc.citation.woscount0en_US
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