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dc.contributor.authorHo, JSen_US
dc.contributor.authorHuang, THen_US
dc.contributor.authorChen, MJen_US
dc.date.accessioned2014-12-08T15:02:53Z-
dc.date.available2014-12-08T15:02:53Z-
dc.date.issued1996-02-01en_US
dc.identifier.issn0038-1101en_US
dc.identifier.urihttp://dx.doi.org/10.1016/0038-1101(95)00126-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/1488-
dc.description.abstractA three-terminal p-n-p gated lateral bipolar transistor in a counter-type channel p-MOSFET structure has exhibited experimentally ideal I-V characteristics in low-level injection, with a peak current gain exceeding 1000. Two-dimensional device simulation and additional experiments have revealed that high current gains with ideal bipolar I-V characteristics can be obtained only if the counter-type channel is fully depleted. Under this condition, not only the surface emitter-base junction barrier beneath the gate is lowered, but also the holes injected from the emitter almost go through the potential valley in the channel. An analytical model and its validity range have both been established to provide understanding of such behavior, and have been supported experimentally by two-dimensional device simulation. The measured I-V characteristics, including high-level injection, have also been appropriately reproduced.en_US
dc.language.isoen_USen_US
dc.titleHigh gain p-n-p gated lateral bipolar action in a fully depleted counter-type: Channel p-MOSFET structureen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/0038-1101(95)00126-3en_US
dc.identifier.journalSOLID-STATE ELECTRONICSen_US
dc.citation.volume39en_US
dc.citation.issue2en_US
dc.citation.spage261en_US
dc.citation.epage267en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1996TR43000012-
dc.citation.woscount2-
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