完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Liao, Po-Hsiang | en_US |
dc.contributor.author | Peng, Kang-Ping | en_US |
dc.contributor.author | Lin, Horng-Chih | en_US |
dc.contributor.author | George, Thomas | en_US |
dc.contributor.author | Li, Pei-Wen | en_US |
dc.date.accessioned | 2019-04-02T05:58:41Z | - |
dc.date.available | 2019-04-02T05:58:41Z | - |
dc.date.issued | 2019-01-01 | en_US |
dc.identifier.issn | 2168-6734 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/JEDS.2018.2876519 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/148987 | - |
dc.description.abstract | We reported experimental fabrication and characterization of Si0.15Ge0.85 n-MOSFETs comprising a gate-stacking heterostructure of Ge-nanospherical gate/SiO2/Si0.15Ge0.85-nanosheet on SOI (100) substrate in a self-organization approach. This unique gate-stacking heterostructure is simultaneously produced in a single oxidation step as a consequence of an exquisitely controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials at 900 degrees C. Process-controlled tunability of nanospherical gate of 60-100 nm in diameter, gate oxide thickness of 3 nm, and Si0.15Ge0.85 nanosheet with compressive strain of -2.5% was achieved. Superior gate modulation is evidenced by subthreshold slope of 150 mV/dec and I-ON/I-OFF > 5 x 10(8) (I-OFF < 10(-6) mu A/mu m and I-ON > 500 mu A/mu m) measured at V-G = + 1V, V-D = + 1 V, and T = 80 K for our device with channel length of 75 nm. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Ge-gate | en_US |
dc.subject | SiGe nanosheet | en_US |
dc.subject | junctionless FET | en_US |
dc.subject | self organization | en_US |
dc.title | Self-Organized Ge Nanospherical Gate/SiO2/Si0.15Ge0.85-Nanosheet n-FETs Featuring High ON-OFF Drain Current Ratio | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/JEDS.2018.2876519 | en_US |
dc.identifier.journal | IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY | en_US |
dc.citation.volume | 7 | en_US |
dc.citation.spage | 46 | en_US |
dc.citation.epage | 51 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000460753000009 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |