標題: Self-organized gate stack of Ge nanosphere/SiO2/Si1-xGex enables Ge-based monolithically-integrated electronics and photonics on Si platform
作者: Liao, P. H.
Kuo, M. H.
Tien, C. W.
Chang, Y. L.
Hong, P. Y.
George, T.
Lin, H. C.
Li, P. W.
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Ge;junctionless;phototransistor;monolithic integration
公開日期: 1-一月-2018
摘要: We report the first-of-its-kind, self-organized gate stack of Ge nanosphere (NP) gate/SiO2/Si1-xGex channel fabricated in a single oxidation step. Process-controlled tunability of the Ge NP size (5-90nm), SiO2 thickness (2-4nm), and Ge content (x = 0.65-0.85) and strain engineering (epsilon(comp) = 1-3%) of the Si1-xGex are achieved. We demonstrated Ge junctionless (JL) n-FETs and photoMOSFETs (PTs) as amplifier and photodetector, respectively, for Ge receivers. L-G of 75nm JL n-FETs feature I-ON/I-OFF > 5x10(8), I-ON > 500 mu A/mu m at V-DS = 1V, T= 80K. Ge-PTs exhibit superior photoresponsivity > 1,000A/W and current gain linearity ranging from nW-mW for 850nm illumination. Size-tunable photo-luminescence (PL) of 300-1600nm (NUV-NIR) are observed on 5-100nm Ge NPs. Our gate stack of Ge NP/SiO2/Si1-xGex enables a practically achievable building block for monolithically-integrated Ge electronic and photonic ICs (EPICs) on Si.
URI: http://hdl.handle.net/11536/152030
ISBN: 978-1-5386-4218-4
期刊: 2018 IEEE SYMPOSIUM ON VLSI TECHNOLOGY
起始頁: 157
結束頁: 158
顯示於類別:會議論文