標題: BENCHMARKING AND ANALYSIS OF SUPERSCALAR ARCHITECTURE
作者: SHIAU, YH
CHUNG, CP
資訊科學與工程研究所
Institute of Computer Science and Engineering
關鍵字: SUPERSCALAR PROCESSING;ARCHITECTURAL MODEL;PERFORMANCE EVALUATION
公開日期: 1-三月-1994
摘要: Superscalar processing can improve the performance of a single CPU beyond that of traditional RISC machines by exploiting instruction-level parallelism. It is the objective of this study to design a superscalar system which will best exploit a given program's instruction-level parallelism. Three different architectural models, XPCB, XXPB, and X4P2, are used as vehicles in evaluating system performance and the degree of utilization of each individual functional unit. The XPCB model is used as a preliminary model to analyze the loading breakdowns of the various function types. It was found that the performance improvement of the XPCB model relative to a single-instruction stream model is only about 4.3 percent. In addition, the fixed-point operations are in great demand, and dominate the behavior as well as performance of the processor. Two enhanced models, the XXPB and the X4P2, are suggested to improve on the performance of the XPCB model by distributing fixed-point, and even floating-point operation loads among multiple functional units of the same type(s). Simulations show that the XXPB and X4P2 models can improve the performance of the sequential model by 50.8 and 61.6 percent, respectively.
URI: http://dx.doi.org/10.1080/02533839.1994.9677580
http://hdl.handle.net/11536/149116
ISSN: 0253-3839
DOI: 10.1080/02533839.1994.9677580
期刊: JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS
Volume: 17
起始頁: 169
結束頁: 177
顯示於類別:期刊論文