標題: | Design of a CMOS phase to digital transducer for optical incremental sensors |
作者: | Chiang, Cheng-Ta Hsieh, Kaun-Chun Huang, Yu-Chung 電機學院 College of Electrical and Computer Engineering |
關鍵字: | Optical incremental sensors;Interpolation circuits;ADC;PLL |
公開日期: | 1-Nov-2011 |
摘要: | In this paper, a CMOS phase to digital transducer for optical incremental sensors is newly proposed. The proposed chip can easily produce phase shifts of signals by using a resistor chain. A set of calibration circuits for optical incremental sensors is also designed in the proposed chip. Another innovation is that the outputs of the proposed chip are directly digitized; they could be easily sent over a wide range of transmission media, such as PSN, radio, optical, IR, ultrasonic, etc. Besides, it does not also need a ROM component or a fast counter as used in the structures of ADC-based and PLL-based interpolations. Based upon the device parameters of 0.5 mu m 2P2M CMOS technology with 5 V power supply, all the functions and performance of the proposed CMOS phase to digital transducer for optical incremental sensors are successfully tested and proven through measurements. The area of the proposed chip including ESD I/O pads is 2010 x 1502 mu m(2). The interpolation factor is 5, 10, and 40. The proposed chip is suitable for optical incremental sensors. (C) 2011 Elsevier B.V. All rights reserved. |
URI: | http://dx.doi.org/10.1016/j.sna.2011.05.026 http://hdl.handle.net/11536/14945 |
ISSN: | 0924-4247 |
DOI: | 10.1016/j.sna.2011.05.026 |
期刊: | SENSORS AND ACTUATORS A-PHYSICAL |
Volume: | 170 |
Issue: | 1-2 |
起始頁: | 106 |
結束頁: | 113 |
Appears in Collections: | Articles |
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