完整後設資料紀錄
DC 欄位語言
dc.contributor.authorHsieh, Chih-Renen_US
dc.contributor.authorChen, Yung-Yuen_US
dc.contributor.authorLou, Jen-Chungen_US
dc.date.accessioned2019-04-02T05:58:18Z-
dc.date.available2019-04-02T05:58:18Z-
dc.date.issued2010-11-01en_US
dc.identifier.issn0167-9317en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.mee.2010.02.010en_US
dc.identifier.urihttp://hdl.handle.net/11536/150019-
dc.description.abstractThe superior characteristics of the fluorinated hafnium oxide/oxynitride (HfO2/SiON) gate dielectric are investigated comprehensively. Fluorine is incorporated into the gate dielectric through fluorinated silicate glass (FSG) passivation layer to form fluorinated HfO2/SiON dielectric. Fluorine incorporation has been proven to eliminate both bulk and interface trap densities due to Hf-F and Si-F bonds formation, which can strongly reduce trap generation as well as trap-assisted tunneling during subsequently constant voltage stress, and results in improved electrical characteristics and dielectric reliabilities. The results clearly indicate that the fluorinated HfO2/SiON gate dielectric using FSG passivation layer becomes a feasible technology for future ultrathin gate dielectrics applications. (C) 2010 Elsevier B.V. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectFluorinated silicate glassen_US
dc.subjectHfO2en_US
dc.subjectThreshold voltage instabilityen_US
dc.titleEffect of fluorinated silicate glass passivation layer on electrical characteristics and dielectric reliabilities for the HfO2/SiON gate stacked nMOSFETen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.mee.2010.02.010en_US
dc.identifier.journalMICROELECTRONIC ENGINEERINGen_US
dc.citation.volume87en_US
dc.citation.spage2241en_US
dc.citation.epage2246en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000281420900039en_US
dc.citation.woscount9en_US
顯示於類別:期刊論文