標題: | Architecture Design of Belief Propagation for Real-Time Disparity Estimation |
作者: | Tseng, Yu-Cheng Chang, Tian-Sheuan 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Belief propagation;disparity estimation |
公開日期: | 1-十一月-2010 |
摘要: | Belief propagation based algorithms perform best in disparity estimation but suffer from high computational complexity and storage, especially in message passing. This paper proposes an efficient architecture design with three techniques to solve the problems. For the memory storage, we propose the spinning-message and the sliding-bipartite node plane that can reduce memory cost to 1.2% for image-scale algorithms and 23.4% for block-scale algorithms, when compared to the traditional approach. For the logic complexity, we propose a buffer-free processing element architecture that has 3.6 times hardware efficiency of the previous work. The three proposed techniques could be applied to various belief propagation based algorithms to save significant hardware cost as well as approach real-time speed. |
URI: | http://dx.doi.org/10.1109/TCSVT.2010.2087434 http://hdl.handle.net/11536/150139 |
ISSN: | 1051-8215 |
DOI: | 10.1109/TCSVT.2010.2087434 |
期刊: | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY |
Volume: | 20 |
起始頁: | 1555 |
結束頁: | 1564 |
顯示於類別: | 期刊論文 |