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dc.contributor.authorLin, Yu-Hsuanen_US
dc.contributor.authorLee, Dai-Yingen_US
dc.contributor.authorWang, Chao-Hungen_US
dc.contributor.authorLee, Ming-Hsiuen_US
dc.contributor.authorHo, Yung-Hanen_US
dc.contributor.authorLai, Erh-Kunen_US
dc.contributor.authorChiang, Kuang-Haoen_US
dc.contributor.authorLung, Hsiang-Lanen_US
dc.contributor.authorWang, Keh-Chungen_US
dc.contributor.authorTseng, Tseung-Yuenen_US
dc.contributor.authorLu, Chih-Yuanen_US
dc.date.accessioned2019-04-02T06:04:21Z-
dc.date.available2019-04-02T06:04:21Z-
dc.date.issued2018-01-01en_US
dc.identifier.issn1930-8868en_US
dc.identifier.urihttp://hdl.handle.net/11536/150746-
dc.description.abstractSince the resistance switching of the transition metal oxide (TMO) resistive random access memory (ReRAM) is based on thc interaction between the oxygen ions and vacancies, the unintentional oxygen/vacancy reaction should be avoided during data retention. This work demonstrates significant improvements on the retention performance by inserting a Si layer in the TiO Ny ReRAM to block the diffusion of oxygen ions through the Ti/TiO,N interface. The mechanism and factors that influenced thc IIRS and LRS retention arc also studied. The retention performance of HRS is correlated with its RESET level while the LRS retention depends on the programming current. The proposed Ti/Si/TiO,N, ReRAMs can switch for more than 103 cycles from array testing results.en_US
dc.language.isoen_USen_US
dc.titleExcellent High Temperature Retention of TiOXNV ReRAM by Interfacial Layer Engineeringen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2018 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000444900700037en_US
dc.citation.woscount0en_US
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