標題: | Analog Placement with Current Flow and Symmetry Constraints using PCP-SP |
作者: | Patyal, Abhishek Pan, Po-Cheng Asha, K. A. Chen, Hung-Ming Chi, Hao-Yu Liu, Chien-Nan 交大名義發表 電子工程學系及電子研究所 National Chiao Tung University Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Analog Layout Synthesis;PCP Constraints;Sequence Pair |
公開日期: | 1-一月-2018 |
摘要: | Modern analog placement techniques require consideration of current path and symmetry constraints. The symmetry pairs can be efficiently packed using the symmetry island configurations, but not all these configurations result in minimum gate interconnection, which can impact the overall circuit routing and performance. This paper proposes the first work that reformulates this problem considering all of them together in the form of Parallel Current Path (PCP) constraints. Then a placement algorithm satisfying these constraints is formulated to reduce a vast search space via efficient sequence pair manipulation. Experimental results show that this formulation and algorithm can satisfy all the constraints in a more tightly packed configuration, resulting in lesser routing length, reduced parasitics and thus better post-layout performance. |
URI: | http://dx.doi.org/10.1145/3195970.3195990 http://hdl.handle.net/11536/150756 |
DOI: | 10.1145/3195970.3195990 |
期刊: | 2018 55TH ACM/ESDA/IEEE DESIGN AUTOMATION CONFERENCE (DAC) |
顯示於類別: | 會議論文 |