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dc.contributor.authorLi, Katherine Shu-Minen_US
dc.contributor.authorChang, Yao-Wenen_US
dc.contributor.authorSu, Chauchinen_US
dc.contributor.authorLee, Chung-Lenen_US
dc.contributor.authorChen, Jwu E.en_US
dc.date.accessioned2019-04-02T06:04:41Z-
dc.date.available2019-04-02T06:04:41Z-
dc.date.issued2006-01-01en_US
dc.identifier.issn2153-6961en_US
dc.identifier.urihttp://hdl.handle.net/11536/150802-
dc.description.abstractWe propose an interconnect diagnosis scheme based on Oscillation Ring test methodology for SOC design with heterogeneous cores. The target fault models are delay faults and crosstalk glitches. We analyze the diagnosability of an interconnect structure and propose a fast diagnosability checking algorithm and an efficient diagnosis ring generation algorithm which achieves the optimal diagnosability. Two optimization techniques improve the efficiency and effectiveness of interconnect diagnosis. In all experiments, our method achieves 100% fault coverage and the optimal diagnosis resolution.en_US
dc.language.isoen_USen_US
dc.titleIEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faultsen_US
dc.typeProceedings Paperen_US
dc.identifier.journalASP-DAC 2006: 11TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, PROCEEDINGSen_US
dc.citation.spage366en_US
dc.citation.epage371en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000237227500075en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper