標題: | FPGA Implementation of OFDM Baseband Processor |
作者: | Sung, Kuohua Hsu, Terng-Yin 資訊工程學系 Department of Computer Science |
關鍵字: | MIMO: Multpile-Input and Multiple-Output;IP: Intellectual Property;OFDM: Orthogonal Frequency-Division Multiplexing;LUT: Look-Up Table;MMCM: Mixed-Mode Clock Manager;OR1200: OpenRISC 1200;CE: Clock Enable;RALU: Reconfigurable Arithmatic Logic Unit;RecMem: Reconfigurable Memory;PCIE: Peripheral Component Interconnect Express |
公開日期: | 1-一月-2017 |
摘要: | this paper explains how to use a field programmable gate array (FPGA) evaluation board, which has limited resources, to build a reduced version of the OFDM baseband processor platform. The contribution in this paper is to propose conversion approaches and establish that these efficient approaches can be used to translate the design of the silicon OFDM- baseband processor into the design of a FPGA. The innovation in this paper is in providing a simple and effective way to accomplish a pipelined divider on an FPGA. |
URI: | http://hdl.handle.net/11536/150829 |
期刊: | 2017 IEEE CONFERENCE ON DEPENDABLE AND SECURE COMPUTING |
起始頁: | 466 |
結束頁: | 467 |
顯示於類別: | 會議論文 |