標題: Low-power and Reference-Less data and clock recovery circuit for visible light receivers
作者: Liu, Ming-Cheng
Chao, Paul C. -P.
Khiong, Soh Sze
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-一月-2018
摘要: In this paper a low power all-digital clock and data recovery (ADCDR) with 1Mhz frequency has been proposed. The proposed circuit is designed for optical receiver circuit on the battery-less photovoltaic IoT (Internet of Things) tags. The conventional RF receiver has been replaced by the visible light optical receiver for battery-less loT tags. With this proposed ADCDR a low voltage, low power consumption & tiny IoT tags can be fabricated. The proposed circuit achieve the maximum bandwidth of 1 MHz, which is compatible with the commercial available LED and light sensor. The proposed circuit has been fabricated in TSMC 0.18um 1P6M standard CMOS process. Experimental results show that the power consumption of the optical receiver is approximately 5.58uW with a supply voltage of 1V and the data rate achieves 1Mbit/s. The lock time of the ADCDR is 0.893ms with 3.31ns RMS jitter period.
URI: http://hdl.handle.net/11536/151116
期刊: PROCEEDINGS OF THE ASME/JSME JOINT INTERNATIONAL CONFERENCE ON INFORMATION STORAGE AND PROCESSING SYSTEMS AND MICROMECHATRONICS FOR INFORMATION AND PRECISION EQUIPMENT, 2018
顯示於類別:會議論文