Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lin, Chen-Wei | en_US |
dc.contributor.author | Yang, Hao-Yu | en_US |
dc.contributor.author | Huang, Chin-Yuan | en_US |
dc.contributor.author | Chen, Hung-Hsin | en_US |
dc.contributor.author | Chao, Mango C. -T. | en_US |
dc.date.accessioned | 2014-12-08T15:21:18Z | - |
dc.date.available | 2014-12-08T15:21:18Z | - |
dc.date.issued | 2011 | en_US |
dc.identifier.isbn | 978-1-4577-1398-9 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/15126 | - |
dc.description.abstract | Detecting stability faults has been a crucial task and a hot research topic for the testing of conventional super-threshold 6T SRAM in the past. When lowering the supply voltage of SRAM to the subthreshold region, the impact of stability faults may significantly change, and hence the test methods developed in the past for detecting stability faults may no longer be effective. In this paper, we first categorize the subthreshold-SRAM designs into different types according to their bit-cell structures. Based on each type, we then analyze the difference of its stability faults compared to the conventional super-threshold 6T SRAM, and discuss how the stability-fault test methods should be modified accordingly. A series of experiments are conducted to validate the effectiveness of each stability-fault test method for different types of subthreshold-SRAM designs. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Detecting Stability Faults in Sub-threshold SRAMs | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2011 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD) | en_US |
dc.citation.spage | 28 | en_US |
dc.citation.epage | 33 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000299009100005 | - |
Appears in Collections: | Conferences Paper |