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dc.contributor.authorLin, Chen-Weien_US
dc.contributor.authorYang, Hao-Yuen_US
dc.contributor.authorHuang, Chin-Yuanen_US
dc.contributor.authorChen, Hung-Hsinen_US
dc.contributor.authorChao, Mango C. -T.en_US
dc.date.accessioned2014-12-08T15:21:18Z-
dc.date.available2014-12-08T15:21:18Z-
dc.date.issued2011en_US
dc.identifier.isbn978-1-4577-1398-9en_US
dc.identifier.urihttp://hdl.handle.net/11536/15126-
dc.description.abstractDetecting stability faults has been a crucial task and a hot research topic for the testing of conventional super-threshold 6T SRAM in the past. When lowering the supply voltage of SRAM to the subthreshold region, the impact of stability faults may significantly change, and hence the test methods developed in the past for detecting stability faults may no longer be effective. In this paper, we first categorize the subthreshold-SRAM designs into different types according to their bit-cell structures. Based on each type, we then analyze the difference of its stability faults compared to the conventional super-threshold 6T SRAM, and discuss how the stability-fault test methods should be modified accordingly. A series of experiments are conducted to validate the effectiveness of each stability-fault test method for different types of subthreshold-SRAM designs.en_US
dc.language.isoen_USen_US
dc.titleDetecting Stability Faults in Sub-threshold SRAMsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2011 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD)en_US
dc.citation.spage28en_US
dc.citation.epage33en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000299009100005-
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