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dc.contributor.authorBor, JCen_US
dc.contributor.authorWu, CYen_US
dc.date.accessioned2014-12-08T15:02:54Z-
dc.date.available2014-12-08T15:02:54Z-
dc.date.issued1996-01-01en_US
dc.identifier.issn1045-9227en_US
dc.identifier.urihttp://dx.doi.org/10.1109/72.478400en_US
dc.identifier.urihttp://hdl.handle.net/11536/1512-
dc.description.abstractA new design methodology is proposed to realize a real cochlea using the multiplexing switched-capacitor (SC) circuits, The proposed technique is based upon the transmission-line model proposed by Zwislocki [5], At the cost of the increase in the number of clock phases, the decay rate in the transition region of the filter section can be increased by adding only a few components, Therefore, the components and chip area of the designed silicon cochlea can be small, An experimental chip containing four filter sections has been designed and fabricated, The measured frequency responses from the 32-section cochlea formed by cascading nine fabricated chips are consistent with both theoretical calculation results and observed behavior of a real cochlea, Moreover, the designed silicon cochlea has the dynamic range of 67 dB in each section and a low sensitivity to process variations, Thus it is suitable for VLSI (very large scale integration) implementation with the associated neural network.en_US
dc.language.isoen_USen_US
dc.titleAnalog electronic cochlea design using multiplexing switched-capacitor circuitsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/72.478400en_US
dc.identifier.journalIEEE TRANSACTIONS ON NEURAL NETWORKSen_US
dc.citation.volume7en_US
dc.citation.issue1en_US
dc.citation.spage155en_US
dc.citation.epage166en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1996TQ67100014-
dc.citation.woscount5-
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