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dc.contributor.authorWei-Lien Sungen_US
dc.contributor.authorHan-Lung Liuen_US
dc.contributor.authorWen-Chuan Wangen_US
dc.contributor.authorShao-Lun Changen_US
dc.contributor.authorShih-Chieh Linen_US
dc.contributor.authorPo-Tsun Liuen_US
dc.contributor.authorGuang-Ting Zhengen_US
dc.contributor.authorShao-Huan Hungen_US
dc.date.accessioned2019-04-11T05:47:41Z-
dc.date.available2019-04-11T05:47:41Z-
dc.date.issued2017-10-26en_US
dc.identifier.govdocG09G003/36en_US
dc.identifier.urihttp://hdl.handle.net/11536/151305-
dc.description.abstractA display panel includes a substrate, and a pixel array and a gate driving circuit. The gate driving circuit provides gate driving signals to the pixel array, and includes shift registers, wherein each shift register includes a voltage providing unit, a first driving transistor, a voltage transmitting unit and a second driving transistor. The voltage providing unit receives a setting signal and a system high voltage to provide a first terminal voltage. The first driving transistor receives a first clock signal and the first terminal voltage to provide a first gate driving signal. The voltage transmitting unit receives the first gate driving signal to provide a second terminal voltage. The second driving transistor receives a second clock signal and the second terminal voltage to provide a second gate driving signal. Therefore, the influence caused by large difference of driving capabilities of the first and the second driving transistor is avoided.en_US
dc.language.isoen_USen_US
dc.titleDISPLAY PANELen_US
dc.typePatentsen_US
dc.citation.patentcountryUSAen_US
dc.citation.patentnumber20170309238en_US
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