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dc.contributor.authorTuo-Hung HOUen_US
dc.contributor.authorSamuel C. PANen_US
dc.contributor.authorPang-Shiuan LIUen_US
dc.date.accessioned2019-04-11T06:07:01Z-
dc.date.available2019-04-11T06:07:01Z-
dc.date.issued2018-05-31en_US
dc.identifier.govdocH01L029/792en_US
dc.identifier.govdocH01L029/78en_US
dc.identifier.govdocH01L029/66en_US
dc.identifier.govdocH01L029/04en_US
dc.identifier.govdocH01L029/417en_US
dc.identifier.urihttp://hdl.handle.net/11536/151427-
dc.description.abstractA semiconductor device including a field effect transistor (FET) device includes a substrate and a channel structure formed of a two-dimensional (2D) material over the substrate. Source and drain contacts are formed partially over the 2D material. A first dielectric layer is formed at least partially over the channel structure and at least partially over the source and drain contacts. The first dielectric layer is configured to trap charge carriers. A second dielectric layer is formed over the first dielectric layer, and a gate electrode is formed over the second dielectric layer.en_US
dc.language.isoen_USen_US
dc.titleIMPACT IONIZATION SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFen_US
dc.typePatentsen_US
dc.citation.patentcountryUSAen_US
dc.citation.patentnumber20180151755en_US
Appears in Collections:Patents


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