完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Huang, Chien-Yao | en_US |
dc.contributor.author | Parashar, Parag | en_US |
dc.contributor.author | Chou, Hao-Ming | en_US |
dc.contributor.author | Lin, Yi-Shivan | en_US |
dc.contributor.author | Lin, Albert | en_US |
dc.date.accessioned | 2019-05-02T00:25:50Z | - |
dc.date.available | 2019-05-02T00:25:50Z | - |
dc.date.issued | 2019-01-01 | en_US |
dc.identifier.issn | 0030-4026 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1016/j.ijleo.2018.10.154 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/151591 | - |
dc.description.abstract | The optimal p-n junction structure in a state-of-the-art Cu(In,Ga)(Se,S)(2) thin-film solar module technology is investigated. For co-optimization design and path-finding, a TCAD model is developed with experimental samples. The engineerable parameters, i.e., F-Ga, GGI(avg), and CdS thickness, are demonstrated to play a critical role in determining the p-n junction properties such as dark current characteristics J(dark)(V), voltage-dependent photocurrent, localized carrier collection efficiency, and interface carrier transportation. We show the optimal Ga-grading is determined by a trade-off between the recombination loss in space charge region and the photo carrier collection in quasi-neutral region. The optimal CdS thickness is determined by a trade-off between carrier collection efficiency, short-circuit current (J(SC)) loss, and J(dark)(V), which depends on varied Ga-profiles. Overall, thin CdS (<= 10 nm) is preferred to reduce the J(SC) loss in accumulated Ga-profiles, while thicker CdS is preferred to enhance the carrier collection efficiency in flatter Ga-profiles. The band alignment effect on varied Cu(In,Ga)(Se,S)(2)/CdS junctions is also investigated. It is found sulfur-incorporation can suppress the V-OC saturation behavior at wide bandgap. For CIGSeS absorber with SS = 20% and D-p = 15%, the maximum V-OC of 780 mV can be achieved by co-optimized Ga-profile. Furthermore, varied Ga-profiles and CdS buffer layers are explored for pathfinding. An optimal p-n junction structure shows a relative + 40% efficiency improvement from 15.5% to 21.9%. This work shows the efficiency headroom of reported CIGSeS thin-film solar module technology through co-optimized CIGSeS composition gradient and buffer layer. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | CIGSeS | en_US |
dc.subject | Solar cell | en_US |
dc.subject | Simulation | en_US |
dc.subject | Path-finding | en_US |
dc.title | A path-finding toward high-efficiency penternary Cu(In,Ga)(Se,S)(2) thin film solar module | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1016/j.ijleo.2018.10.154 | en_US |
dc.identifier.journal | OPTIK | en_US |
dc.citation.volume | 179 | en_US |
dc.citation.spage | 837 | en_US |
dc.citation.epage | 847 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000464491400109 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |