完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Kuo, Po-Yi | en_US |
dc.contributor.author | Chang, Chien-Min | en_US |
dc.contributor.author | Liu, Po-Tsun | en_US |
dc.date.accessioned | 2019-06-03T01:09:16Z | - |
dc.date.available | 2019-06-03T01:09:16Z | - |
dc.date.issued | 2018-01-01 | en_US |
dc.identifier.isbn | 978-1-5386-4218-4 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/152011 | - |
dc.description.abstract | Amorphous indium tungsten oxide (a-IWO) nano-sheet (NS) junctionless (JL) transistors (a-IWO NS-JLTs) have been successfully fabricated and demonstrated in the category of indium oxide based thin film transistors (TFTs). We have scaled down thickness of a-IWO channel to 4nm. The proposed a-IWO NS-JLTs with low operation voltages exhibit good electrical characteristics: near ideal peak subthreshold swing (S.S.) similar to 63mV/dec., high field-effect mobility (mu(FE)) similar to 25.3 cm(2)/V-s. The novel a-IWO NS-JLTs with low temperature processes are promising candidates for monolithic three-dimensional integrated circuits (3-D ICs), vertical stacked (VS) hybrid CMOS technology, and large-scale integration (LSI) applications in the future. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Low Thermal Budget Amorphous Indium Tungsten Oxide Nano-Sheet Junctionless Transistors with Near Ideal Subthreshold Swing | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2018 IEEE SYMPOSIUM ON VLSI TECHNOLOGY | en_US |
dc.citation.spage | 21 | en_US |
dc.citation.epage | 22 | en_US |
dc.contributor.department | 光電工程學系 | zh_TW |
dc.contributor.department | Department of Photonics | en_US |
dc.identifier.wosnumber | WOS:000465075200006 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |