標題: | Energy Efficient CNN Inference Accelerator using Fast Fourier Transform |
作者: | Chung, Ya-Chin Cheng, Po-Hsiang Liu, Chih-Wei 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-一月-2019 |
摘要: | We use FFT-based convolution in frequency domain to reduce computational complexity in CNNs. The properties of conjugate symmetry and down-sampling is adopted to further reduce complexity. By eliminating filter weights in CNNs that can save computational requirement but lead to accuracy loss. The simulation result reveals that eliminating filter weights in frequency domain is more accurate than that in time domain. With the proposed design synthesized by TSMC 90 nm CMOS technology, the total latency, power and energy are considerably competitive. As a result, our FFT-based CNN accelerator is energy-efficient. |
URI: | http://hdl.handle.net/11536/152559 |
ISBN: | 978-1-7281-0655-7 |
ISSN: | 2474-2724 |
期刊: | 2019 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT) |
起始頁: | 0 |
結束頁: | 0 |
顯示於類別: | 會議論文 |