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dc.contributor.authorLin, Yu-Hsienen_US
dc.contributor.authorYou, Hsin-Chiangen_US
dc.contributor.authorChien, Chao-Hsinen_US
dc.date.accessioned2014-12-08T15:21:30Z-
dc.date.available2014-12-08T15:21:30Z-
dc.date.issued2012-01-01en_US
dc.identifier.issn1071-1023en_US
dc.identifier.urihttp://dx.doi.org/10.1116/1.3668101en_US
dc.identifier.urihttp://hdl.handle.net/11536/15286-
dc.description.abstractThis study proposes and demonstrates a silicon-oxide-nitride-oxide-silicon (SONOS)-type memory device based on a high-k dielectric praseodymium oxide (Pr2O3) trapping layer. In the proposed design, channel hot electron injection programming and band-to-band hot-hole injection erasing allow highly efficient two-bit and four-level device operation. The proposed design also has a total memory window of 5 V, a ten-year V-t retention window larger than 0.8 V between adjacent levels, and enough memory window for 10(5) programming/erasing cycles of endurance. The proposed SONOS-type Pr2O3 trapping layer flash memory exhibits large memory windows, high program/erase speed, good endurance, and good disturbance characteristics. (C) 2012 American Vacuum Society. [DOI: 10.1116/1.3668101]en_US
dc.language.isoen_USen_US
dc.titleTwo-bit/four-level Pr2O3 trapping layer for silicon-oxide-nitride-oxide-silicon-type flash memoryen_US
dc.typeArticleen_US
dc.identifier.doi10.1116/1.3668101en_US
dc.identifier.journalJOURNAL OF VACUUM SCIENCE & TECHNOLOGY Ben_US
dc.citation.volume30en_US
dc.citation.issue1en_US
dc.citation.epageen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000299388200009-
dc.citation.woscount2-
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