Characterization of Four-Level Random Telegraph Noise in a Gate-All-Around Poly-Si Nanowire Transistor

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DC Field	Value	Language
dc.contributor.author	Chang, You-Tai	en_US
dc.contributor.author	Li, Pei-Wen	en_US
dc.contributor.author	Lin, Horng-Chih	en_US
dc.date.accessioned	2020-01-02T00:03:27Z	-
dc.date.available	2020-01-02T00:03:27Z	-
dc.date.issued	2019-01-01	en_US
dc.identifier.issn	2161-4636	en_US
dc.identifier.uri	http://hdl.handle.net/11536/153323	-
dc.description.abstract	Four-level random-telegraph-noise (RTN) characteristics of a gate-all-around (GAA) poly-Si junctionless (JL) nanowire (NW) transistor induced by two discrete traps are studied in this work. By carefully analyzing the RTN, depths of the two traps in the gate oxide can be identified separately. Consistent information is obtained by assessing the probability of transitions between different levels.	en_US
dc.language.iso	en_US	en_US
dc.title	Characterization of Four-Level Random Telegraph Noise in a Gate-All-Around Poly-Si Nanowire Transistor	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2019 SILICON NANOELECTRONICS WORKSHOP (SNW)	en_US
dc.citation.spage	123	en_US
dc.citation.epage	124	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000501001400060	en_US
dc.citation.woscount	0	en_US
Appears in Collections:	Conferences Paper