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dc.contributor.authorChang, You-Taien_US
dc.contributor.authorLi, Pei-Wenen_US
dc.contributor.authorLin, Horng-Chihen_US
dc.date.accessioned2020-01-02T00:03:27Z-
dc.date.available2020-01-02T00:03:27Z-
dc.date.issued2019-01-01en_US
dc.identifier.issn2161-4636en_US
dc.identifier.urihttp://hdl.handle.net/11536/153323-
dc.description.abstractFour-level random-telegraph-noise (RTN) characteristics of a gate-all-around (GAA) poly-Si junctionless (JL) nanowire (NW) transistor induced by two discrete traps are studied in this work. By carefully analyzing the RTN, depths of the two traps in the gate oxide can be identified separately. Consistent information is obtained by assessing the probability of transitions between different levels.en_US
dc.language.isoen_USen_US
dc.titleCharacterization of Four-Level Random Telegraph Noise in a Gate-All-Around Poly-Si Nanowire Transistoren_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 SILICON NANOELECTRONICS WORKSHOP (SNW)en_US
dc.citation.spage123en_US
dc.citation.epage124en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000501001400060en_US
dc.citation.woscount0en_US
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