Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Muneeshwaran, M. | en_US |
dc.contributor.author | Wang, Chi-Chuan | en_US |
dc.date.accessioned | 2020-05-05T00:02:19Z | - |
dc.date.available | 2020-05-05T00:02:19Z | - |
dc.date.issued | 2020-05-05 | en_US |
dc.identifier.issn | 1359-4311 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1016/j.applthermaleng.2020.115118 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/154124 | - |
dc.description.abstract | Stringent temperature control is of great importance in the post-exposure baking of the lithography process, and this is usually maintained through the lamp heating and multizone heating method, which demands a precise control system. There is a vast scope for the wafer temperature homogeneity improvement by considering the thermal aspects in bake station design. In this study, both an experimental and a transient numerical analysis are carried out to examine the factors that could seriously affect the temperature uniformity of the wafer during the baking process. It is found that the guide plate arrangement, guide plate slope, and the air gap between the lid and hot plate play a critical role in controlling the wafer temperature uniformity. On this basis, some further improved bake stations are proposed to attain a better temperature homogeneity across the wafer. The performance of the improved designs is analyzed numerically. Yet, a better design based on the simulation is developed and tested experimentally. The new design features a 2.5 degrees guide plate with the funnel arrangement subject to the air gap condition, offering a temperature homogeneity within 0.2-0.3 degrees C on a 6 '' wafer. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Wafer | en_US |
dc.subject | Temperature uniformity | en_US |
dc.subject | Lithography | en_US |
dc.subject | Bake unit | en_US |
dc.subject | Thermal design | en_US |
dc.subject | Hotplate | en_US |
dc.title | Thermal design aspects for improving temperature homogeneity of silicon wafer during thermal processing in microlithography | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1016/j.applthermaleng.2020.115118 | en_US |
dc.identifier.journal | APPLIED THERMAL ENGINEERING | en_US |
dc.citation.volume | 171 | en_US |
dc.citation.spage | 0 | en_US |
dc.citation.epage | 0 | en_US |
dc.contributor.department | 機械工程學系 | zh_TW |
dc.contributor.department | Department of Mechanical Engineering | en_US |
dc.identifier.wosnumber | WOS:000525326400074 | en_US |
dc.citation.woscount | 0 | en_US |
Appears in Collections: | Articles |