完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Peng, Chun-Yen | en_US |
dc.contributor.author | Cheng, Hao-Tien | en_US |
dc.contributor.author | Kuo, Hao-Chung | en_US |
dc.contributor.author | Wu, Chao-Hsin | en_US |
dc.date.accessioned | 2020-05-05T00:02:20Z | - |
dc.date.available | 2020-05-05T00:02:20Z | - |
dc.date.issued | 2020-03-01 | en_US |
dc.identifier.issn | 0018-9383 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TED.2020.2966364 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/154139 | - |
dc.description.abstract | This article describes an optimized design and process for the improvement of the electrical properties of vertical-cavity surface-emitting lasers (VCSELs) via the impurity-induced disordering (IID) technology. Through the IID process, the electrical current path can be tailored to detour around the defect centers introduced by the oxidation process, resulting in a noticeable improvement in the dc and the RF characteristics of the IID VCSEL. The threshold current was reduced from 0.341 to 0.225 mA due to better current injection efficiency in the IID VCSEL. The characteristic temperature of the IID VCSEL increased from 106 to 150 K, and the slope of the I-V characteristics under low-level-injection regime could be improved to a factor of exp. The RF characteristics also echoed the dc characteristics, which the optical bandwidth of the IID VCSEL enhanced from 18.95 to 23.49 GHz, and showed a prominent difference on the factor (similar to 0.26 to similar to 0.22 ns) and the D factor (similar to 7 to similar to 11 GHz/(mA)(1/2)). The IID VCSEL is then employed for a data transmission link, an eye diagram was characterized at up to 44 Gb/s and passed 40-Gb/s error-free testing under on-off-keying (OOK) modulation. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Electrical characteristic analysis | en_US |
dc.subject | impurity-induced disordered vertical-cavity surface-emitting laser (VCSEL) | en_US |
dc.subject | process optimization of high-speed VCSEL | en_US |
dc.subject | VCSEL | en_US |
dc.title | Design and Optimization of VCSELs for up to 40-Gb/s Error-Free Transmission Through Impurity-Induced Disordering | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TED.2020.2966364 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | en_US |
dc.citation.volume | 67 | en_US |
dc.citation.issue | 3 | en_US |
dc.citation.spage | 1041 | en_US |
dc.citation.epage | 1046 | en_US |
dc.contributor.department | 光電工程學系 | zh_TW |
dc.contributor.department | Department of Photonics | en_US |
dc.identifier.wosnumber | WOS:000519593800040 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |