標題: | Standard 0.18um 1P6M CMOS IC foundry flow for accelerometer, analog readout circuit and wafer level capping package integration |
作者: | Huang, C. J. Chen, C. S. Wen, K. A. Cheng, Y. T. Chen, J. Y. Chang, C. S. Chou, W. C. 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2011 |
摘要: | The first standard CMOS IC foundry flow is presented for the monolithic integration of MEMS sensor, analog readout circuit and wafer level capping on standard 0.18um 1P6M technology. The sensor and circuit parts are fabricated at first on the same 8 '' substrate using a standard 0.18um 1P6M CMOS process. The sensor part is then micromachined and released by a foundry-based post-CMOS DRIE process followed by wafer level capping. The test vehicle for the proposed integration flow contains a single-axial accelerometer, analog readout circuit with input common-mode feedback and QFN64 package. The measurement results show that the whole system can have 206mV/g of sensitivity and output noise is less than 250 mu g/root Hz. The proposed methodology has led a promising way for integrating MEMS, IC and package in a conventional IC foundry manufacturing flow. |
URI: | http://hdl.handle.net/11536/15471 |
ISBN: | 978-1-4244-9289-3 |
期刊: | 2011 IEEE SENSORS |
起始頁: | 750 |
結束頁: | 753 |
顯示於類別: | 會議論文 |