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dc.contributor.authorHsieh, Ping-Yien_US
dc.contributor.authorChang, Yi-Juien_US
dc.contributor.authorChen, Pin-Junen_US
dc.contributor.authorChen, Chun-Liangen_US
dc.contributor.authorYang, Chih-Chaoen_US
dc.contributor.authorHuang, Po-Tsangen_US
dc.contributor.authorChen, Yi-Jingen_US
dc.contributor.authorShen, Chih-Mingen_US
dc.contributor.authorLiu, Yu-Weien_US
dc.contributor.authorHuang, Chien-Chien_US
dc.contributor.authorTai, Ming-Chien_US
dc.contributor.authorLo, Wei-Chungen_US
dc.contributor.authorShen, Chang-Hongen_US
dc.contributor.authorShieh, Jia-Minen_US
dc.contributor.authorChang, Da-Chiangen_US
dc.contributor.authorChen, Kuan-Nengen_US
dc.contributor.authorYeh, Wen-Kuanen_US
dc.contributor.authorHu, Chenmingen_US
dc.date.accessioned2020-10-05T02:01:28Z-
dc.date.available2020-10-05T02:01:28Z-
dc.date.issued2019-01-01en_US
dc.identifier.isbn978-1-7281-4031-5en_US
dc.identifier.issn2380-9248en_US
dc.identifier.urihttp://hdl.handle.net/11536/155245-
dc.description.abstractMonolithic 3D back-end of line (BEOL) FinFET switch arrays are demonstrated in large single crystalline Si islands (2.56 mu m(2)), whose location, size and shape are determined by design. Details of the improved location-controlled-grain (LCG) technique are presented. A voltage regulator implemented with the BEOL switch arrays using external control signals shows better theoretical figure of merit (FOM) of 0.089ns than 2D voltage regulators of 0.43ns.en_US
dc.language.isoen_USen_US
dc.titleMonolithic 3D BEOL FinFET switch arrays using location-controlled-grain technique in voltage regulator with better FOM than 2D regulatorsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)en_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000553550000011en_US
dc.citation.woscount0en_US
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