標題: | Sub-nA Low-Current HZO Ferroelectric Tunnel Junction for High-Performance and Accurate Deep Learning Acceleration |
作者: | Wu, Tzu-Yun Huang, Hsin-Hui Chu, Yueh-Hua Chang, Chih-Cheng Wu, Ming -Hung Hsu, Chien-Hua Wu, Chien -Ting Wu, Min-Ci Wu, Wen-Wei Chang, Tian-Sheuan Lee, Heng-Yuan Sheu, Shyh-Shyuan Lot, Wei-Chung Hou, Tuo-Hung 材料科學與工程學系 電子工程學系及電子研究所 Department of Materials Science and Engineering Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-一月-2019 |
摘要: | This paper presents a unique opportunity of HZO ferroelectric tunnel junction (FTJ) for in-memory computing. The device operates at an extremely low sub-nA current while simultaneously achieving 50-ns fast switching, > 10(7) cycling endurance, > 10-yr retention, minimal variability, and analog state modulation. We analyze an FTJ-based deep binary neural network. It achieves better accuracy and remarkable 702, 101, and 7 x 10(4) times improvements in power, area, and energy area product efficiency compared with those using NVMs with a typical mu A cell current designed for fast memory access. |
URI: | http://hdl.handle.net/11536/155252 |
ISBN: | 978-1-7281-4031-5 |
ISSN: | 2380-9248 |
期刊: | 2019 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) |
起始頁: | 0 |
結束頁: | 0 |
顯示於類別: | 會議論文 |