完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, Pin-Jun | en_US |
dc.contributor.author | Shen, Chih-Ming | en_US |
dc.contributor.author | Yang, Chih-Chao | en_US |
dc.contributor.author | Tai, Ming-Chi | en_US |
dc.contributor.author | Lo, Wei-Chung | en_US |
dc.contributor.author | Shen, Chang-Hong | en_US |
dc.contributor.author | Hu, Chenming | en_US |
dc.contributor.author | Chen, Kuan-Neng | en_US |
dc.date.accessioned | 2020-10-05T02:01:30Z | - |
dc.date.available | 2020-10-05T02:01:30Z | - |
dc.date.issued | 2019-01-01 | en_US |
dc.identifier.isbn | 978-1-7281-6070-2 | en_US |
dc.identifier.issn | 2150-5934 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/155282 | - |
dc.description.abstract | In this research, Finite Element Method (FEM) is used to simulate transient thermal conduction in the monolithic three-dimensional integrated circuit (3DIC) with a novel location-controlled-grain (LCG) technique. Through this method, the impact of laser flux, amorphous Si thickness and interlayer dielectric (ILD) thickness on that model can be investigated. Furthermore, with the assistance of thermal damage simulation, we can utilize the optimal process parameters in this state-of-the-art technique to accelerate the development of advanced semiconductor technologies. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Transient Thermal Damage Simulation for Novel Location-Controlled Grain Technique in Monolithic 3D IC | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2019 14TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT 2019) | en_US |
dc.citation.spage | 104 | en_US |
dc.citation.epage | 107 | en_US |
dc.contributor.department | 國際半導體學院 | zh_TW |
dc.contributor.department | International College of Semiconductor Technology | en_US |
dc.identifier.wosnumber | WOS:000556271500019 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |