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DC 欄位語言
dc.contributor.authorLee, Yu-Hueien_US
dc.contributor.authorChu, Kuan-Yuen_US
dc.contributor.authorShih, Chun-Jenen_US
dc.contributor.authorChen, Ke-Horngen_US
dc.date.accessioned2014-12-08T15:22:15Z-
dc.date.available2014-12-08T15:22:15Z-
dc.date.issued2012-05-01en_US
dc.identifier.issn0885-8993en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TPEL.2011.2173701en_US
dc.identifier.urihttp://hdl.handle.net/11536/15761-
dc.description.abstractA differential-in differential-out error amplifier and a load regulation enhancement mechanism are proposed in the buck converter that aims to improve load regulation and noise immunity. By using the proportional compensator in the proposed converter, there is no need of external compensation components in this design. As a result, a compact-size and high-performance dc-dc buck converter can be guaranteed. Experimental results show that load regulation can be improved from 0.5 to 0.025 mV/mA. The test chip was fabricated by 0.25 mu m CMOS process and occupied 1.65 mm(2) active silicon area.en_US
dc.language.isoen_USen_US
dc.subjectCurrent-mode operationen_US
dc.subjectdc-dc converteren_US
dc.subjectdifferential-in differential-out (DIDO) amplifieren_US
dc.subjectload regulationen_US
dc.subjectsystem compensationen_US
dc.titleProportional Compensated Buck Converter With a Differential-In Differential-Out (DIDO) Error Amplifier and Load Regulation Enhancement (LRE) Mechanismen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TPEL.2011.2173701en_US
dc.identifier.journalIEEE TRANSACTIONS ON POWER ELECTRONICSen_US
dc.citation.volume27en_US
dc.citation.issue5en_US
dc.citation.spage2426en_US
dc.citation.epage2436en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000301195600020-
dc.citation.woscount5-
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