完整後設資料紀錄
DC 欄位語言
dc.contributor.authorChuang, Ching-Teen_US
dc.date.accessioned2014-12-08T15:23:26Z-
dc.date.available2014-12-08T15:23:26Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-4244-3827-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/16411-
dc.description.abstractThis paper discusses the challenges in the modeling, analysis, and TCAD of nanoscale devices and circuits. Compact modeling of gate-oxide related long term degradations, and quantum mechanical and nanoscale effects are addressed. Atomistic simulations and mixed-mode simulations based on fundamental physics for evaluation and exploration of emerging devices and circuits are illustrated. Automated migration to non-planar FinFET device structure is discussed. Fast Monte Carlo algorithm to enable statistical analysis of large scale circuits and memories, and to speed up TCAD computational efficiency is elaborated. The needs for phonon Boltzmann Transport based, coupled self-consistent electro-thermal solver/analysis, and full-band Monte Carlo electron-phonon interaction analysis for accurate prediction of self-heating in devices with ultra-thin silicon film are discussed.en_US
dc.language.isoen_USen_US
dc.titleModeling, Analysis, and TCAD of Nanoscale Devices and Circuitsen_US
dc.typeProceedings Paperen_US
dc.identifier.journalISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5en_US
dc.citation.spage2305en_US
dc.citation.epage2308en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000275929801263-
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