A Capacitor-Free CMOS Low-Dropout Voltage Regulator

Abstract

This paper presents novel frequency compensation techniques for low-dropout (LDO) voltage regulator. An enhanced active feedback frequency compensation is employed to improve its frequency response. This LDO can provide high stability for loading current range up to 100 mA without loading capacitors. Moreover, the total compensation capacitors only require 7 pF for this technique. This allows us to integrate the compensation capacitors within the LDO chip easily. The proposed LDO regulator was designed using TSMC 0.35-mu m CMOS technology. With an active area of 0.14 mm(2), the quiescent current is only 40 mu A. The input voltage is ranged from 1.73 V to 5 V for loading current of 100 mA and the output voltage of 1.5 V. The main advantage of this approach is that the LDO circuit can be stable when we connect external load capacitors with ultra low ESR, or even when we eliminate the load capacitors.