Process- and Random-Dopant-Induced Characteristic Variability of SRAM with nano-CMOS and Bulk FinFET Devices

Abstract

In this study, a three-dimensional "atomistic" circuit-device coupled simulation approach is advanced to investigate the process-variation and random dopant induced characteristic fluctuations in planar metal-oxide-semiconductor field-effect-transistor (MOSFET) static random access memory (SRAM) from 65-nm to 16-nm gate length. As the gate length of the planar MOSFETs scales from 65 nm to 16 nm, the SNM fluctuation increases from 4% to 27%. To reduce the device variability induced fluctuation in circuit, a 16-nm-gate silicon-on-insulator fin-type field-effect-transistor (FinFET) with aspect ratio (fin height / fin width) equal to two is investigated. Due to its superior electrostatic integrity and larger effective device width, the fluctuation of SNM of 16-nm-gate FinFET SRAM could be suppressed by five times. Comparing with the 65 nm planar MOSFET SRAM, FinFETs' SRAM is promising in aggressively scaled silicon technology.