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dc.contributor.authorYu, Shih-Anen_US
dc.contributor.authorHuang, Pei-Yuen_US
dc.contributor.authorLee, Yu-Minen_US
dc.date.accessioned2014-12-08T15:24:36Z-
dc.date.available2014-12-08T15:24:36Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-4244-2748-2en_US
dc.identifier.urihttp://hdl.handle.net/11536/17073-
dc.description.abstractIn this paper, a grid-based multiple supply voltage (MSV) assignment method is presented to statistically minimize the total power consumption of 3-D IC. This method consists of a statistical electro-thermal simulator to get the mean and variance of on-chip, a thermal-aware statistical static timing analysis (SSTA) to take into account the thermal effect on circuit timing, the statistical power-delay-sensitivity-slack product to be the optimization criterion, and an incremental update of statistical timing to save the runtime. The experimental results demonstrate the effectiveness of the developed methodology and indicate that the consideration of the thermal effect in the circuit simulation is imperative.en_US
dc.language.isoen_USen_US
dc.titleA Multiple Supply Voltage Based Power Reduction Method in 3-D ICs Considering Process Variations and Thermal Effectsen_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF THE ASP-DAC 2009: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2009en_US
dc.citation.spage55en_US
dc.citation.epage60en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000265675400010-
Appears in Collections:Conferences Paper