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dc.contributor.authorKer, Ming-Douen_US
dc.contributor.authorLin, Yan-Liangen_US
dc.date.accessioned2014-12-08T15:24:40Z-
dc.date.available2014-12-08T15:24:40Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-4244-4072-6en_US
dc.identifier.urihttp://hdl.handle.net/11536/17129-
dc.description.abstractA new 2xVDD-tolerant I/O buffer realized with only 1xVDD devices has been proposed and verified in a 0.18-mu m CMOS process. With the dynamic source output technique and the new gate-controlled circuit, the new proposed I/O buffer can transmit and receive the signals with the voltage swing twice as high as the normal power supply voltage (VDD) without suffering gate-oxide reliability problem. The proposed 2xVDD-tolerant I/O circuit solution can be implemented in different nanoscale CMOS processes to meet the mixed-voltage interface applications in microelectronic systems.en_US
dc.language.isoen_USen_US
dc.titleDesign of 2xVDD-Tolerant I/O Buffer with 1xVDD CMOS Devicesen_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCEen_US
dc.citation.spage539en_US
dc.citation.epage542en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000275926300118-
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