標題: Design of 2xVDD-tolerant I/O buffer with considerations of gate-oxide reliability and hot-carrier degradation
作者: Tsai, Hui-Wen
Ker, Ming-Dou
電機學院
College of Electrical and Computer Engineering
公開日期: 2007
摘要: A new 2xVDD-tolerant I/O buffer circuit, realized with only 1xVDD devices in nanoscale CMOS technology, to prevent transistors against gate-oxide reliability and hot-carrier degradation is proposed. The new proposed 2xVDD-tolerant I/O buffer has been implemented in a 130-nm CMOS process to serve a 2.5-V/1.2-V mixed-voltage interface without using the additional thick gate-oxide (2.5-V) devices. This 2xVDD-tolerant I/O buffer has been successfully confirmed by the experimental results with a signal speed of up to 133 MHz for PCI-X application.
URI: http://hdl.handle.net/11536/10211
http://dx.doi.org/10.1109/ICECS.2007.4511221
ISBN: 978-1-4244-1377-5
DOI: 10.1109/ICECS.2007.4511221
期刊: 2007 14TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-4
起始頁: 1240
結束頁: 1243
顯示於類別:會議論文


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