完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWang, Tzu-Mingen_US
dc.contributor.authorKer, Ming-Douen_US
dc.contributor.authorYeh, Steveen_US
dc.contributor.authorChang, Ya-Chunen_US
dc.date.accessioned2014-12-08T15:24:44Z-
dc.date.available2014-12-08T15:24:44Z-
dc.date.issued2006en_US
dc.identifier.isbn978-1-4244-0394-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/17182-
dc.identifier.urihttp://dx.doi.org/10.1109/ICECS.2006.379765en_US
dc.description.abstractWordline voltage generating circuit with high speed active mode and low power standby mode is proposed. In the active mode, two different ring oscillators with high clock frequency (f(CLK)) 170MHz, and low clock frequency (f(CLK)) 25MHz which is also the operating frequency of the entire circuit, are employed. The proposed circuit has a short response time of 3 mu s typically in active mode, and very low standby current about 3 mu A in standby mode.en_US
dc.language.isoen_USen_US
dc.titleLow-power wordline voltage generator for low-voltage flash memoryen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1109/ICECS.2006.379765en_US
dc.identifier.journal2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3en_US
dc.citation.spage220en_US
dc.citation.epage223en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000252489600055-
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