完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Huang, Jia-Bin | en_US |
dc.contributor.author | Lin, Yu-Kun | en_US |
dc.contributor.author | Chang, Tian-Sheuan | en_US |
dc.date.accessioned | 2014-12-08T15:25:05Z | - |
dc.date.available | 2014-12-08T15:25:05Z | - |
dc.date.issued | 2006 | en_US |
dc.identifier.isbn | 978-1-4244-0386-8 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/17466 | - |
dc.description.abstract | As network technologies advance, Scalable Video Coding (SVC) has become increasingly popular due to its universal multimedia access capability and competitive compression performance with the state-of-the-art single-layer video coding. However, it's decoding delay, memory bandwidth and storage requirement are much larger than those of single-layer video coding due to various scalabilities. In this paper, we propose a novel display order instead of direct bitstream order oriented decoding method for the SVC decoder to solve above implementation problems. The analysis for hardware-oriented algorithm shows that the proposed decoding order can reduce the decoding delay, memory bandwidth and storage requirement significantly while is still applicable to various scalable requirements. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | H.264/AVC | en_US |
dc.subject | motion compensated temporal filtering | en_US |
dc.subject | scalable video coding | en_US |
dc.title | A display order oriented scalable video decoder | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2006 IEEE Asia Pacific Conference on Circuits and Systems | en_US |
dc.citation.spage | 1976 | en_US |
dc.citation.epage | 1979 | en_US |
dc.contributor.department | 交大名義發表 | zh_TW |
dc.contributor.department | National Chiao Tung University | en_US |
dc.identifier.wosnumber | WOS:000246793200493 | - |
顯示於類別: | 會議論文 |