Process induced instability and reliability issues in low temperature poly-Si thin film transistors

doi:10.1109/RELPHY.2006.251338

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Chen, Chih-Yang	en_US
dc.contributor.author	Wang, Shen-De	en_US
dc.contributor.author	Shieh, Ming-Shan	en_US
dc.contributor.author	Chen, Wei-Cheng	en_US
dc.contributor.author	Lin, Hsiao-Yi	en_US
dc.contributor.author	Yeh, Kuan-Lin	en_US
dc.contributor.author	Lee, Jam-Wen	en_US
dc.contributor.author	Lei, Tan-Fu	en_US
dc.date.accessioned	2014-12-08T15:25:06Z	-
dc.date.available	2014-12-08T15:25:06Z	-
dc.date.issued	2006	en_US
dc.identifier.isbn	0-7803-9498-4	en_US
dc.identifier.uri	http://hdl.handle.net/11536/17481	-
dc.identifier.uri	http://dx.doi.org/10.1109/RELPHY.2006.251338	en_US
dc.description.abstract	We investigated the impact of plasma process on the devices' performance and reliability degradation of low temperature poly-Si thin film transistors (LTPS TFTs). LTPS TFTs with different antenna areas were used to study the effects of the plasma etching process on the devices. The larger TFT antenna area, the more performance instability occurs. The reliability of LTPS TFTs with large antenna areas was found to be degraded from gate bias stress and hot carrier stress.	en_US
dc.language.iso	en_US	en_US
dc.title	Process induced instability and reliability issues in low temperature poly-Si thin film transistors	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.doi	10.1109/RELPHY.2006.251338	en_US
dc.identifier.journal	2006 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 44TH ANNUAL	en_US
dc.citation.spage	713	en_US
dc.citation.epage	714	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000240855800153	-
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