標題: Stimulus generation for interface protocol verification using the non-deterministic extended finite state machine model
作者: Shih, CH
Huang, JD
Jou, JY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2005
摘要: Verifying if air integrated component is compliant with certain interface protocol is a big issue in component-based SOC designs. Massive constrained random simulation stimuli are becoming crucial to achieve a high verification quality. To further improve the quality, the stimulus biasing technique should be used to guide the simulation to hit design corners. In this paper we model the interface protocol with the non-deterministic extended finite state machine (NEFSM), and then propose an automatic stimulus generation approach based oil the NEFSM. This approach is capable of providing numerous biasing options. Experiment results demonstrate the high controllability scheme.
URI: http://hdl.handle.net/11536/17556
ISBN: 0-7803-9571-9
ISSN: 1552-6674
期刊: HLDVT'05: TENTH ANNUAL IEEE INTERNATIONAL HIGH-LEVEL DESIGN VALIDATION AND TEST WORKSHOP, PROCEEDINGS
起始頁: 87
結束頁: 93
顯示於類別:會議論文