Combined frame memory architecture for motion compensation in video decoding

Abstract

This paper proposes a combined frame memory architecture which is smaller in size and is potential in reducing power consumption compared to the most commonly used ping-pong frame memory. The combined frame memory maps both reference frame data and current frame data onto one single frame memory instead of two in ping-pong architecture. Together with the characteristic of high percentage of MBs with zero-valued MVs and no residual, the combined frame memory architectures is evaluated to be able to reduce not only the memory size, but also the average energy consumption and memory access latency for applications like surveillance, video phone, and video conference. According to the statistics and analysis result, the proposed combined frame memory architecture memory size is only 57% compared to ping-pong architecture. The proposed combined frame memory architecture can reduce up to 83% of average latency and 39% of average power consumption compared to pin-pong frame memory architecture.