完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Ker, MD | en_US |
dc.contributor.author | Chen, SL | en_US |
dc.contributor.author | Tsai, CS | en_US |
dc.date.accessioned | 2014-12-08T15:25:23Z | - |
dc.date.available | 2014-12-08T15:25:23Z | - |
dc.date.issued | 2005 | en_US |
dc.identifier.isbn | 0-7803-8834-8 | en_US |
dc.identifier.issn | 0271-4302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/17766 | - |
dc.description.abstract | A new mixed-voltage I/O buffer with a blocking NMOS and a dynamic gate-controlled circuit for high-voltage-tolerant applications is proposed. The new proposed I/O buffer can receive the input signals with the voltage swing twice as high as the normal power supply voltage (VDD), which has been fabricated in a 0.25-mu m CMOS process to receive 5-V input signals without suffering gate-oxide reliability and circuit leakage issues. The new proposed mixed-voltage I/O buffer can be easily scaled down toward 0.18-mu m (or below) CMOS process to serve different mixed-voltage I/O interfaces, such as 1.8/3.3-V or 1.2/2.5-V applications. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Design on mixed-voltage I/O buffer with blocking NMOS and dynamic gate-controlled circuit for high-voltage-tolerant applications | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | en_US |
dc.citation.spage | 1859 | en_US |
dc.citation.epage | 1862 | en_US |
dc.contributor.department | 電機學院 | zh_TW |
dc.contributor.department | College of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000232002401252 | - |
顯示於類別: | 會議論文 |