Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Liu, TM | en_US |
dc.contributor.author | Lee, WP | en_US |
dc.contributor.author | Lin, TA | en_US |
dc.contributor.author | Lee, CY | en_US |
dc.date.accessioned | 2014-12-08T15:25:23Z | - |
dc.date.available | 2014-12-08T15:25:23Z | - |
dc.date.issued | 2005 | en_US |
dc.identifier.isbn | 0-7803-8834-8 | en_US |
dc.identifier.issn | 0271-4302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/17768 | - |
dc.description.abstract | A memory-efficient architecture design for de-blocking filter in H.264/AVC is presented. We use the novel data arrangement of Column-of-Pixel to facilitate the memory access and reuse the pixel value. Further, we propose a hybrid filter scheduling to improve the system throughput. As compared with some existing approaches of realizing de-blocking filter [1] [2], the proposed design saves about one-half of processing cycles. With novel data arrangement and hybrid filter scheduling, an efficient architecture design is implemented. Further, it is evaluated on H.264 system and easily achieved real-time decoding with 1080 HD (1920x1088@30fps) when working frequency is 100MHz. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A memory-efficient deblocking filter for H.264/AVC video coding | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | en_US |
dc.citation.spage | 2140 | en_US |
dc.citation.epage | 2143 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000232002402058 | - |
Appears in Collections: | Conferences Paper |