完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Ker, MD | en_US |
dc.contributor.author | Chen, JS | en_US |
dc.contributor.author | Chu, CY | en_US |
dc.date.accessioned | 2014-12-08T15:25:24Z | - |
dc.date.available | 2014-12-08T15:25:24Z | - |
dc.date.issued | 2005 | en_US |
dc.identifier.isbn | 0-7803-8834-8 | en_US |
dc.identifier.issn | 0271-4302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/17783 | - |
dc.description.abstract | A new sub-1-V curvature-compensated CMOS bandgap reference, which utilizes the temperature-dependent currents generated from the parasitic NPN and PNP BJT devices in CMOS process, is presented. The new proposed sub-1-V curvature-compensated CMOS bandgap reference has been successfully verified in a standard 0.25-mu m CMOS process. The experimental results have verified that, at the minimum supply voltage of 0.9 V, the output reference voltage is 536.7 mV with a temperature coefficient of 19.55 ppm/degrees C from 0 degrees C to 100 degrees C. With 0.9-V supply voltage, the measured power noise rejection ratio is -25.5 dB at 10 kHz. | en_US |
dc.language.iso | en_US | en_US |
dc.title | New curvature-compensation technique for CMOS bandgap reference with sub-1-v operation | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | en_US |
dc.citation.spage | 3861 | en_US |
dc.citation.epage | 3864 | en_US |
dc.contributor.department | 電機學院 | zh_TW |
dc.contributor.department | College of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000232002403211 | - |
顯示於類別: | 會議論文 |