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dc.contributor.authorHsiao, TYen_US
dc.contributor.authorLin, CCen_US
dc.contributor.authorChang, HCen_US
dc.date.accessioned2014-12-08T15:25:25Z-
dc.date.available2014-12-08T15:25:25Z-
dc.date.issued2005en_US
dc.identifier.isbn0-7803-9333-3en_US
dc.identifier.issn1520-6130en_US
dc.identifier.urihttp://hdl.handle.net/11536/17818-
dc.description.abstractAn application specific digital signal processor for channel coding is presented. The vector operations can improve both the performance of memory accesses and program code density. The special function units and datapaths for channel decoding accelerate the decoding speed and facilitate algorithm implementation. The processor had been fabricated in a 0.18 mu m CMOS 1P6M technology. The 2 chip size is 7.73 mm(2) including 18k bits embedded memory, and the power consumption is 141 mW while decoding Reed-Solomon code and convolutional code. In contrast with general purpose processor designs, the results show this chip has at least 50% improvement in code density and 66% data rate enhancement.en_US
dc.language.isoen_USen_US
dc.titleAn AS-DSP for forward error correction applicationsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2005 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS - DESIGN AND IMPLEMENTATION (SIPS)en_US
dc.citation.spage609en_US
dc.citation.epage612en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000236758900110-
Appears in Collections:Conferences Paper