完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Liu, TM | en_US |
dc.contributor.author | Lee, WP | en_US |
dc.contributor.author | Lee, CY | en_US |
dc.date.accessioned | 2014-12-08T15:25:26Z | - |
dc.date.available | 2014-12-08T15:25:26Z | - |
dc.date.issued | 2005 | en_US |
dc.identifier.isbn | 0-7803-9134-9 | en_US |
dc.identifier.issn | 1522-4880 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/17824 | - |
dc.description.abstract | In this paper, we propose an area-efficient design approach to cover both in-loop and post-loop filtering processes for multiple video coding standards. In addition, we propose a hybrid filter scheduling to improve system throughput. Compared with available designs [1][2], the proposed approach saves about one-half of processing cycles, and hence reduces power dissipation. Compared to the original loop-filter, the proposed loop/post filter only incurs 20.7% of extra cost. Simulation results show that our proposal can easily achieve real-time decoding for 1080HD when the working frequency is 100MHz. | en_US |
dc.language.iso | en_US | en_US |
dc.title | An area-efficient and high-throughput de-blocking filter for multi-standard video applications | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2005 International Conference on Image Processing (ICIP), Vols 1-5 | en_US |
dc.citation.spage | 3589 | en_US |
dc.citation.epage | 3592 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000235773304122 | - |
顯示於類別: | 會議論文 |