標題: | Communication-driven task binding for multiprocessor with latency insensitive Network-on-Chip |
作者: | Lin, Liang-Yu Wang, Cheng-Yeh Huang, Pao-Jui Chou, Chih-Chieh Jou, Jing-Yang 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2005 |
摘要: | Network-on-Chip is a new design paradigm for designing core based System-on-Chip. It features high degree of reusability and scalability. In this paper, we propose a switch which employs the latency insensitive concepts and applies the round-robin scheduling techniques to achieve high communication resource utilization. Based on the assumptions of the 2D-mesh network topology constructed by the switch, this work not only models the communication and the contention effect of the network, but develops a communication-driven task binding algorithm that employs the divide and conquer strategy to map applications onto the multiprocessor system-on-chip. The algorithm attempts to derive a binding of tasks such that the overall system throughput is maximized. To compare with the task binding without consideration of communication and contention effect, the experimental results demonstrate that the overall improvement of the system throughput is 20% for 844 test cases. |
URI: | http://hdl.handle.net/11536/17865 |
ISBN: | 0-7803-8736-8 |
期刊: | ASP-DAC 2005: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 |
起始頁: | 39 |
結束頁: | 44 |
顯示於類別: | 會議論文 |