應用於單晶片多處理器系統之任務結合方法

Abstract

採用單晶片網路為通訊架構來建立以矽智財元件為基礎之系統單晶片是一種新的設計方法。這種設計方法的特性是具有高度的可重複使用性以及延展性。在這篇論文裡，我們詳述一個二步驟的任務結合演算法。利用這個演算法所建立的工具可將一個以參數化任務圖所描述的應用結合至以二維網狀交換器為通訊骨幹之單晶片多處理器系統平台上。該演算法嘗試將任務結合至可使用的計算資源上並且使得整個應用的運算時間降到最小以及將系統效能提升至最大。結合軟體處理器以及交換器模型之後，我們可以模擬整個系統。在短時間之內，我們可以檢視系統的效能並且萃取重要的平台參數。

Network-on-Chip is a new design paradigm for designing core based System-on-Chip. It features high degree of reusability and scalability. In this thesis, we describe a two-step task binding algorithm that has been used to build a tool to map an application, described by a parameterized task graph, onto Multi-Processor System-on-Chip platform with a two dimensional mesh of switches as a communication backbone. The algorithm tries to find a mapping of tasks to available computational resources so that the overall execution time of the application is minimized and the system performance gain is maximized. By incorporating software processor and switch models, a system simulation can be performed. And in few minutes, the system performance gain can be assessed and some important platform parameters can be extracted.