Diverse instability behaviors for n-channel low-temperature polycrystalline silicon thin film transistors

Abstract

In this paper, the instability mechanisms and the diverse behaviors of n-channel LTPS TFTs under various bias stress conditions have been invesigated. Statistically, it was found that TFTs present the highest standard deviation under V-gs = 12.5 V and V-ds = 20 V. This was because the carriers gained energy to break only weak Si-Si bonds reflecting the different effects of the various grains on the hot carrier effects. Discussion of the variations in different bias stress conditions is helpful in determining the lifetime prediction of the system-on-panel (SOP) design.